1. Field of the Invention
The invention relates to a memory comprising simultaneously addressable memory elements, notably a memory comprising an array of memory elements, which can be addressed at random in at least one coordinate direction in which the memory elements are arranged, and also comprising selection means for addressing, moreover, a series of successive memory elements together in said coordinate direction.
Using such a memory, rectangular patterns can be written into the memory in a particularly fast manner by the simultaneous addressing of all relevant memory elements. The memory can also be used in, for example a variety of graphic systems.
2. Prior Art
In an article of Daniel S. Whelan in "Computer graphics", Vol. 16, No. 3 (July 1982), pp. 147-153 a rectangular area filling display system is described.
Therein, the addressing means for the simultaneously addressable memory elements require for both the X- and Y-directions an address (LA) of a lower limit (la) and an address (UA) for an upper limit (ua) for selecting a band of outputs between and inclusive of the lower and upper limits [la, la+1, . . . ua]. The addressing means are provided with decoders for simultaneously addressing rows or columns of memory elements between and inclusive of the lower and upper limits. In a n-bit address decoder rows or columns 0, 1, . . . 2.sup.n -1 can be addressed.
The address decoders first select the rows or columns la, la+1, . . . 2.sup.n -1, thereafter the rows or columns 0, 1, . . . ua, while finally by means of an AND operation the band [la, la+1, . . . ua] is selected.